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Recent Blog Posts
Who said Cadence Can't Invent New Technology Anymore?
By
SteveSvoboda
on December 19, 2008
I and the rest of the Cadence C-to-Silicon Compiler (CtoS) team were thrilled yesterday to learn that EDN selected C-to-Silicon Compiler as on...
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Thanks for a Great 2008!
By
Jason Andrews
on December 19, 2008
Even though 2008 will probably go down in history as the year of Doom and Gloom we can find a Ray of Hope here and there. 2008 was a good year...
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Functional Verification Community
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The Eternal Debate: "Like" vs. "When" Inheritance
By
Team Specman
on January 05, 2009
First: Happy New Year, Specmaniacs!Much like the rivarly between the New York Yankees and the Boston Red Sox (or if you prefer, ManU vs. Chelsea, or the...
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Power tool: The Reflection API
By
Team Specman
on December 29, 2008
One endless source of neat little tricks is the Reflection API built into Specman. You can implement pretty much any utility you dream of with it,...
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Logic Design Community
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Flash: Qi Wang - Cadence Low Power Architect Presenting @ VLSI Conference in India
By
Kenneth Chang
on January 06, 2009
Just a short note for those who will be attending the exciting 22nd International conference on VLSI design in India.Don't miss Dr. Qi Wang of Caden...
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Looking Ahead, A Ground-Level View
By
Jack Erickson
on December 30, 2008
This was supposed to be a post either reviewing 2008 or looking ahead to 2009. Well, 2008 was quite an eventful year. Yes, I have a keen ...
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Digital Implementation Community
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Coming This Friday January 9th: Encounter Digital Implementation Office Hours
By
Bob Dwyer
on January 05, 2009
Happy New Year everyone! I hope you all had a restful, enjoyable and healthy holiday season. I trust that you're all going through a mountain of E-m...
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It’s the Season of Giving – Send Me Your Design Innovations!
By
Rahul Deokar
on December 19, 2008
In the last blog, I wrote about innovating your way out of recession with new designs that address new challenges/requirements in new ways…and ho...
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Custom IC Community
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Video Chat with Lead Architect of Virtuoso Accelerated Parallel Simulator
By
Deana Spencer
on December 11, 2008
Virtuoso Accelerated Parallel Simulator was just released and I asked Ilya Yusim, lead architect for the new simulator and Nebabie Kebebew, product...
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What's New With Virtuoso?
By
Deana Spencer
on December 08, 2008
If you were wondering what's new with Virtuoso you may want to check out the latest webinars we offered this fall. The IC6.1 Virtuoso Platform, pr...
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RF Design Community
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Going broadside with electromagnetic modeling of advanced processes
By
Thomas Costas
on October 09, 2008
It has caught my attention that designs using fabrication processes such as 65nm, 45nm, 32nm, and smaller, have changed the landscape when it comes to e...
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Tip of the Week: When should I use the pss/qpss Harmonic Balance vs. Shooting Newton Engine?
By
Tawna Wilsey
on September 03, 2008
Shooting Newton (shooting) and harmonic balance (HB) are complementary technologies and used for circuits that exhibit different behaviors. The shooting...
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PCB Design Community
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Thank You!
By
Jerry Grzenia
on December 18, 2008
As the 2008 year comes to a close, I wanted to say Thank You!Thanks to the hard working Cadence people who experimented with new ideas about the Cadence...
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What's Good About the SPB16.2 PSpice Models? BSIM4 Support!
By
Jerry Grzenia
on December 17, 2008
The SPB16.2 release now has new MOSFET device Model BSIM4 Support in PSpicePSpice designers had been requesting support for the BSIM4 Mosfet Model. The ...
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IC Packaging and SiP Design Community
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Need some stability in your Package Power?
By
Brad Griffin
on October 21, 2008
It is not too late to sign up for the Package Power Integrity webinar that will be presented on 10/23 11:00 PDT. Click here to register.This webin...
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CDNLive! - 10 Gbit package design paper available to conference attendees
By
Brad Griffin
on October 01, 2008
For those of you that attended CDNLive! but may have missed the presentation on multi-gigabit package design by Kevin Roselle of Bayside Design, you can...
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Manufacturability Signoff Community
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Diagnosis of Compressed Test Patterns: Several Things to Consider
By
Thomas Jackson
on October 21, 2008
Today, it is essential to put into place a strong methodology to identify sources of yield loss during manufacturing. One widely accepted method i...
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Video interviews from the floor of CDNLive!
By
Tom Diederich
on September 10, 2008
With hundreds of attendees buzzing about, our video crew has been busy with their “man-on-the-street” style interviews from the floor of &ld...
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Cadence Unveils Next-Generation Parallel Circuit Simulator for the Verification ...
Cadence Reports Q3 2008 Revenue of $232 Million and Completion of Accounting Investigation
ChipEstimate.com Announces New IP Partners
Cadence Introduces Industry's First Family of MIPI Standard-Compliant OVM Multi-Language Verification IP
Cadence Provides Open Source OVM Adoption Solution for VMM Users in Response to Industry Demand
Cadence Announces Encounter Digital Implementation System with EDA Industry ...
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